Dutch lithography machine maker ASML recently dethroned Applied Materials to become the world's largest fab tool maker, and its future looks even brighter following the news that it is preparing production of its new EUV (extreme ultraviolet) machine. High NA (numerical aperture).
This system, which is about the size of a double-decker bus and weighs 150,000 kilograms, is capable of etching lines just 8 nm wide on semiconductors. This is a significant reduction from the previous generation, allowing more transistors to be included on a chip, leading to faster processing and greater storage capacity, critical for AI applications.
Intel, a major customer, has already received its first machine at its D1X factory in Oregon and plans to begin production using the system in late 2025.
Not for China
“Intel's goal is to stay at the forefront of semiconductor lithography technology and we have been developing our EUV expertise and capability over the past year. Working closely with ASML, we will leverage the high-resolution pattern of High-NA EUV as one of the ways we continue Moore's Law and maintain our strong history of progression down to the smallest of geometries,” said Dr. Ann Kelleher, executive vice president and general manager of Technology Development at Intel.
ASML says it has received between 10 and 20 orders to date for its machine, which is priced at $350 million, indicating optimistic expectations for the technology. This comes despite accusations about the cost-effectiveness of the next-generation lithography tool for upcoming nodes.
Although China was ASML's second-largest market last year, Reuters reports that the new device will not be sold to manufacturers there, following the US government's crackdown on the export of cutting-edge technology to the People's Republic.
EUV lithography, unique to ASML, prints microchips using light with a wavelength of just 13.5 nm, nearly the range of X-rays. ASML (and Intel) say the technology is driving Moore's Law and supporting new transistor designs and chip architectures.
The new platform is expected to support high-volume chip manufacturing in 2025-2026, enabling geometric scaling of chips over the next decade. By reducing the number of process steps in high-volume manufacturing, chipmakers could benefit from significant reductions in defects, costs and cycle time.
