In 2019, the Institute of Computing Technology (ICT) of the Chinese Academy of Sciences (CAS) initiated the “XiangShan” project, which aimed to create an open-source, high-performance RISC-V processor. The result of this effort was the XiangShan processor core, which has gained a lot of attention on GitHub, with over 4,500 stars and 630 forks to date.
XiangShan has also received support from several companies, leading to the formation of a group focused on further developing the processor and promoting the RISC-V ecosystem.
The Beijing Institute of Open Source Chips (BOSC), a non-profit organization, was created to help drive the development of XiangShan, with a focus on regular updates and improvements to the processor's design, performance, and energy efficiency. The goal is to make XiangShan a competitive open source processor that can serve a wide range of applications.
The Linux of processors
XiangShan made an appearance at Hot Chips 2024, a symposium on high-performance chips held in late August in Stanford, California, where he caught the attention of ServingTheHomewhich noted that it is “a high-performance CPU design, rather than lower-performance designs we’ve seen in others.”
Described as “The Linux of processors” in one of XiangShan’s slides, the project shows a two-tier CPU core roadmap that highlights two architectures: Kunminghu, which targets the Arm Neoverse N2 and is designed for high performance in servers and data centers, and Nanhu, which targets the Arm Cortex A76, focused on power and area efficiency for industrial control applications. You can see a comparison in this image:
The XiangShan Project plans to advance its microarchitecture through a dual development team approach, focusing on agile development to refine high-performance open source processors, with test chips tested annually for each architecture to meet the needs of both industry and academia.
As SomethingPatrick Kennedy observes: “It's great to see that these are basically two RISC-V projects from China that are aimed squarely at the performance and product segments of two Arm CPUs. We often see custom RISC-V designs, but these are more general-purpose chips.”
